An Innovative Ellipsoidal Layout Style to Further Boost the Electrical Performance of MOSFETs

dc.contributor.authorGimenez S.P.
dc.contributor.authorCorreia M.M.
dc.contributor.authorNeto E.D.
dc.contributor.authorSilva C.R.
dc.date.accessioned2019-08-19T23:45:29Z
dc.date.available2019-08-19T23:45:29Z
dc.date.issued2015
dc.description.abstract© 1980-2012 IEEE.This letter describes the impact of using a new gate geometry (ellipsoidal) rather than the standard one (rectangular) to implement planar metal-oxide-semiconductor field-effect transistors (MOSFETs). Our experimental results have been carried out using a 350-nm bulk complementary MOS technology node. We show that the proposed layout has been capable of increasing the ON-state and saturation drain currents in 2 and 3.2 times, respectively. In addition, the ellipsoidal MOSFET has been able to reduce the delay time constant by 61%. Therefore, we believe this new layout can be used as an alternative way to implement MOSFETs, boosting their analog electrical performance with an appropriate layout changing.
dc.description.firstpage705
dc.description.issuenumber7
dc.description.lastpage707
dc.description.volume36
dc.identifier.citationGIMENEZ, SALVADOR P.; CORREIA, MARCELLO M.; NETO, ENRICO D.; SILVA, CRISTINA R.. An Innovative Ellipsoidal Layout Style to Further Boost the Electrical Performance of MOSFETs. IEEE Electron Device Letters, v. 36, n. 7, p. 705-707, 2015.
dc.identifier.doi10.1109/LED.2015.2437716
dc.identifier.issn0741-3106
dc.identifier.urihttps://repositorio.fei.edu.br/handle/FEI/1308
dc.relation.ispartofIEEE Electron Device Letters
dc.rightsAcesso Restrito
dc.subject.otherlanguageEllipsoidal layout style
dc.subject.otherlanguageLCE and PAMDLE
dc.subject.otherlanguageMOSFET
dc.titleAn Innovative Ellipsoidal Layout Style to Further Boost the Electrical Performance of MOSFETs
dc.typeArtigo
fei.scopus.citations21
fei.scopus.eid2-s2.0-84934295917
fei.scopus.subjectElectrical performance
fei.scopus.subjectEllipsoidal layout style
fei.scopus.subjectGate geometry
fei.scopus.subjectLCE and PAMDLE
fei.scopus.subjectMOS technology
fei.scopus.subjectMOS-FET
fei.scopus.subjectPlanar metal
fei.scopus.subjectSaturation drain current
fei.scopus.updated2024-02-01
fei.scopus.urlhttps://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84934295917&origin=inward
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