Analog performance improvement of self-cascode structures composed by UTBB transistors using back gate bias
dc.contributor.author | Rodrido Doria | |
dc.contributor.author | TREVISOLI, R. | |
dc.contributor.author | Michelly De Souza | |
dc.contributor.author | Marcelo Antonio Pavanello | |
dc.contributor.author | FLANDRE, D. | |
dc.contributor.authorOrcid | https://orcid.org/0000-0003-4448-4337 | |
dc.contributor.authorOrcid | https://orcid.org/0000-0001-6472-4807 | |
dc.contributor.authorOrcid | https://orcid.org/0000-0003-1361-3650 | |
dc.date.accessioned | 2022-01-12T21:59:39Z | |
dc.date.available | 2022-01-12T21:59:39Z | |
dc.date.issued | 2015-11-20 | |
dc.description.abstract | This paper explores the use of the back gate bias to enhance the analog performance of self-cascode structures composed by 25nm-long UTBB SOI MOSFETs. It is shown, for the first time, that the use of back gate bias can improve the intrinsic voltage gain by 15 dB, making it larger than the one presented by a 50nm-long single device. | |
dc.identifier.citation | DORIA, R.; TREVISOLI, R.; DE SOUZA, M.; PAVANELLO, M. A. Analog performance improvement of self-cascode structures composed by UTBB transistors using back gate bias. 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015. Nov. 2015. | |
dc.identifier.doi | 10.1109/S3S.2015.7333512 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/3946 | |
dc.relation.ispartof | 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2015 | |
dc.rights | Acesso Restrito | |
dc.subject.otherlanguage | Active Substrate Bias | |
dc.subject.otherlanguage | Analog Behavior | |
dc.subject.otherlanguage | Self-Cascode Structure | |
dc.subject.otherlanguage | UTBB SOI | |
dc.title | Analog performance improvement of self-cascode structures composed by UTBB transistors using back gate bias | |
dc.type | Artigo de evento | |
fei.scopus.citations | 6 | |
fei.scopus.eid | 2-s2.0-84961780329 | |
fei.scopus.subject | Active substrates | |
fei.scopus.subject | Analog behavior | |
fei.scopus.subject | Analog performance | |
fei.scopus.subject | Back-gate bias | |
fei.scopus.subject | Intrinsic voltage gains | |
fei.scopus.subject | Self-cascode | |
fei.scopus.subject | SOI-MOSFETs | |
fei.scopus.subject | UTBB SOI | |
fei.scopus.updated | 2025-02-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84961780329&origin=inward |