Repositório do Conhecimento Institucional do Centro Universitário FEI

Navegando por Assunto "Silicon-On-Insulator"

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    Artigo de evento 9 Citação(ões) na Scopus
    Analog performance of asymmetric self-cascode p-channel fully depleted SOI transistors
    (2012-03-17) Michelly De Souza; Marcelo Antonio Pavanello; FLANDRE, D.
    This work presents an analysis of the analog performance of asymmetric threshold voltage self-cascode fully depleted (FD) p-type SOI transistors. The experimental results showed that this structure is able to improve the devices transconductance and output conductance, resulting in increased intrinsic voltage gain and breakdown voltage in comparison to single transistors and the conventional symmetric self-cascode. © 2012 IEEE.
  • N/D
    Artigo de evento 2 Citação(ões) na Scopus
    Comparative Analysis of Transcapacitances in Asymmetric Self-Cascode and Graded-Channel SOI nMOSFETs
    (2022-07-04) ALVES, C. R.; D'OLIVEIRA, L. M.; Michelly De Souza
    © 2022 IEEE.This work presents a comparative study of the transcapacitances of asymmetric self-cascode (A-SC) and graded-channel (GC) silicon-on-insulator (SOI) nMOSFETs, by means of two-dimensional numerical simulations. Simulated results show that the gate-to-drain capacitance is smaller for the ASC SOI device if compared to the GC SOI device, despite of the applied VDS.