Engenharia Elétrica
URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21
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4 resultados
Resultados da Pesquisa
- Reliability performance characterization of SOI FinFets(2009-06-02) CLAEYS, C.; PUT, S.; RAFI, J. M.; Marcelo Antonio Pavanello; MARTINO, J. A.; SIMOEN, E.FinFET devices are explicitly mentioned in the ITRS roadmap and have a good potential for scaling CMOS to 22 nm and below. Some physical characterization and reliability aspects of these devices are reviewed. Attention is given to transient floating body effects and low frequency noise, which may yield information on the materials' characteristics like carrier recombination lifetime or interface and oxide trap density. These methods can be useful to study the performance of these components under harsh operation conditions of low or high temperature, or at high bias voltages. ©2009 IEEE.
- Low-frequency noise in asymmetric self-cascode FD SOI nMOSFETs(2016-08-29) ASSALTI, R.; Rodrigo Doria; Marcelo Antonio Pavanello; Michelly De Souza; FLANDRE, D.This paper investigates the origin of low-frequency noise in Asymmetric Self-Cascode Fully Depleted SOI nMOSFETs biased in linear regime with regards to the variation of gate voltage and the channel doping concentration through experimental results.
- Low-frequency noise investigation in long-channel fully depleted inversion mode n-type SOI nanowire(2018-08-27) MOLTO, A. R.; PAZ, B. C.; CASSE, M.; BARRAUD, S.; REIMBOLD, G.; VINET, M.; FAYNOT, O.; Marcelo Antonio PavanelloThis work presents a Low-Frequency Noise (LFN) investigation in fully depleted n-type Silicon-On-Insulator (SOI) nanowire transistors working in linear region with VDS = 50mV. Long-channel devices of 1μ {m and 10μ {m are evaluated. A wide range of fin width is considered in the LFN analysis, from 15nm up to 105nm. The results showed a flicker noise (1/FF) behavior and a decrease of normalized noise SID/IDs2 with gate voltage overdrive increase for frequencies bellow 500Hz. Above this frequency, it was possible to see that generation and recombination noise with 1/f2 decay overlaps the flicker noise, becoming the predominant noise source. The cut-off frequency increases with gate voltage overdrive while the gamma exponent decreases. Gamma reduces from 1.3 to 0.9 and from 0.95 to 0.65 for devices with channel length of 1 μ {m and 10μ {m, respectively. A major noise variation of about one order of magnitude with gate voltage overdrive increase was observed in devices of 1 μ {m long in comparison to channel length of 10μ {m. The devices showed weak noise dependence on fin width due to mobility decrease as nanowires become narrower.
- Back bias influence on low-frequency noise of n-type nanowires SOI MOSFETs(2019-02-11) MOLTO, A. R.; PAZ. B. C.; Rodrido Doria; Michelly De Souza; Marcelo Antonio Pavanello© 2018 IEEE.This work presents the influence of back (substrate) bias on the low-frequency noise of fully depleted inversion mode n-FET nanowire transistors with different fin widths. Several gate voltage overdrives were applied (from 0mV to 200mV) with devices working in linear regime. The results showed a noise increase for both positive and negative substrate biases (Vsub) and the changing of γ , from 0.9 with zero back bias down to 0.4 for Vsub = -40V. The results obtained for device with channel length of 1 μ m and fin width of 15nm show a decrease of the spectral noise density with the gate voltage overdrive increase for frequencies below 100Hz, which is characterized by mobility mechanism influence at the power spectrum density noise. It was also possible to see in these devices that the generation and recombination noise with decay of 1/f2 overlaps the 1/f γnoise for frequencies above 100Hz. It was also possible to see the noise increase with Wfin decrease as expected.