Engenharia Elétrica

URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21

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Application of the symmetric doped double-gate model in circuit simulation containing double-gate graded-channel transistors
(2010-09-05) CONTRERAS, E.; CERDEIRA, A.; ALVARADO, J.; Marcelo Antonio Pavanello
The development of models to simulate circuits containing new devices is an important task to allow the introduction of these devices in practical applications. In this paper we show the advantages of using the recently developed Symmetric Doped Double-Gate Model as already introduced in SmartSpice simulator, for modeling circuits containing Double-Gate Graded-Channel (GC) transistors. In this case there is no need to use two different models to represent the graded-channel device, as has been done up to now. Current-mirror circuits using GC devices have been simulated and the results were validated comparing them with those obtained using the MIXED-MODE module of two-dimensional numerical ATLAS simulator of the GC devices.
Extracting discriminant information from neuroimages: A multivariate computational framework to analyze the whole human brain
(2010-01-05) Carlos E. Thomaz; LEÃO, R. D.; SATO, J. R.; BUSATTO, G. F.
© 2010 Nova Science Publishers, Inc.With the increasing anatomical resolution of the neuroimaging methods, clinicians are challenged nowadays, more than ever before, with the problem of detecting and interpreting statistically significant changes on neuroimages that are often distributed and involve simultaneously several structures of the human brain. In this chapter, we describe a general multivariate linear framework that analyses all the data simultaneously rather than segmented versions separately or feature-by-feature. This approach has been specially designed for extracting discriminative information from high dimensional data, dealing with the problem of small sample sizes, and it has been successfully applied in MR imaging analysis of the human brain. The multivariate linear framework is not restricted to any particular set of features and describes a simple and straightforward way of explaining multivariate changes of the whole brain on the original MR image domain, giving results that are statistically relevant to be further validated and interpreted by clinicians.
The Haar wavelets used how expansion function in the method of the moments in the solution of some electrostatic problems
(2010-08-05) Aldo Belardi; CARDOSO, J. R.; SARTORI, C. A. F.
This work presents the methodology from the determination the charge superficial density and electrical fields, in three simple structures to a finite straight wire, square plane plates and the capacitance between to plane plate, all finite and submitted to a constant potential. That involves the method of the moments using as expansion function the Haar wavelets instead of the pulse function, in order to reach a good precision and reducing the computational execution time. We also intend to take advantages of the wavelets application through the Cholesky decomposition, talking about formation of scattered matrixes, and the detection of nulls values.
Thin-film lateral SOI pin diodes for thermal sensing reaching the cryogenic regime
(2010-09-01) Michelly De Souza; RUE, B.; FLANDRE, D.; Marcelo Antonio Pavanello
This paper presents the performance of lateral SOI PIN diodes for temperature sensing in the range of 100 K to 400 K. Experimental results indicate that PIN diodes can be used to implement temperature sensors with high accuracy in cryogenic regime, provided that a suitable temperature range is chosen for calibration. Numerical simulations using Atlas two-dimensional simulator were performed in order to confirm this hypothesis and extend the analysis, verifying the accuracy of the existing model.
Performance of source follower buffers implemented with standard and strained triple-gate nFinFETs
(2010-09-05) Marcelo Antonio Pavanello; MARTINO, J. A.; SIMOEN, E.; ROOYACKERS, R.; COLLAERT, N.; CLAEYS, C.
In this work the application of standard and strained triple-gate FinFETs in unity-gain source-follower configuration is compared. The analysis is performed by evaluating the buffer voltage gain with respect to the fin width and channel length as well as the total harmonic distortion. It is demonstrated that the application of strained material in narrow FinFETs, when the devices are operating in double-gate mode, can be beneficial for the performance of buffers in any channel length. On the other hand, for triple-gate FinFETs or quasi-planar ones the degradation of the output conductance overcomes the transconductance improvements from strained material and the performance of standard buffers is better than of strained ones. Narrow strained buffers also offer better harmonic distortion.
A framework of intentional characters for simulation of social behavior
(2010-07-12) DA COSTA, L.C.; CLUA, E.W.; GIRALDI, G. A.; BERNARDINI, F. C.; Reinaldo Bianchi; SCHULZE, B.; MONTENEGRO, A. A.
Realism is thriving today in many types of media, particularly in video games, where the polygon count continues growing up. However, this realism pushes up the necessity of a real behavior of the virtual actors, in order to follow the credibility of the characters. We present an approach for crowd simulation that works adaptively to situations that occur in virtual atmosphere. Our approach allows that a realistic character adapts his behavior and actions with the information noticed from the atmosphere which it is close to. For this work, the execution atmosphere will be a simulation of a real catastrophic atmosphere, such as as flooding and collapses.
Probabilistic logic encoding of spatial domains
(2010-07-20) Paulo Santos; HUMMEL, B.; FENELON, V.; COZMAN, F. G.
This paper presents a formalisation of a spatial domain in terms of a qualitative spatial reasoning formalism, encoded in a probabilistic description logic. The QSR formalism chosen is a subset of a cardinal direction calculus and the probabilistic description logic used has the relational structures of the well-known ALC language, allied with the inference methods of Bayesian Networks. We consider a scenario consisting of a road navigated by an experimental vehicle equipped with three on-board sensors: A digital map, a GPS and a video camera. This paper presents experiments where the proposed formalism is used to answer queries about driving directions, lanes and vehicles.
Analog operation temperature dependence of nMOS junctionless transistors focusing on harmonic distortion
(2011-09-05) Rodrigo Doria; Marcelo Antonio Pavanello; TREVISOLI, R. D.; Michelly De Souza; LEE, C.-W.; FERAIN, I.; AKHAVAN, N. D.; YAN, R.; RAZAVI, P.; YU, R.; FRANTI, A.; COLINGE, J-P.
This paper performs a comparative study of the analog performance of Junctionless Nanowire Transistors (JNTs) and classical Trigate inversion mode (IM) devices focusing on the harmonic distortion. The study has been carried out in the temperature range of 223 K up to 473 K. The non-linearity or harmonic distortion (HD) has been evaluated in terms of the total and the third order distortions (THD and HD3, respectively) at a fixed input bias and at a targeted output swing. Several parameters important for the HD evaluation have also been observed such as the transconductance to the drain current ratio (gm/IDS), the Early voltage (VEA) and the intrinsic voltage gain (AV). Trigate devices showed maximum AV around room temperature whereas in JNTs the intrinsic voltage gain increases with the temperature. Due to the different AV characteristics, Junctionless transistors present improved HD at higher temperatures whereas inversion mode Trigate devices show better HD properties at room temperature.When both devices are compared, Junctionless transistors present better THD and HD3 with respect to the IM Trigate devices.
Temperature and silicon film thickness influence on the operation of lateral SOI PIN photodiodes for detection of short wavelengths
(2011-09-05) Michelly De Souza; BULTEEL, O.; FLANDRE, D.; Marcelo Antonio Pavanello
This work presents an analysis of the temperature influence on the performance of a lateral thin-film SOI PIN photodiodes when illuminated by low wavelengths, in the range of blue and ultra-violet (UV). Experimental measurements performed from 100K to 400K showed that the optical responsitivity of SOI PIN photodetectors is affected by temperature change, being reduced at low and moderately high temperatures. Two-dimensional numerical simulations showed the same trends as in the experimental results, and were used both to investigate the physical phenomena responsible for the observed behavior as a function of the temperature as well as to predict the influence of silicon film thickness downscaling on the photodetector performance.
Influence of fin shape and temperature on conventional and strained MuGFETs' analog parameters
(2011-09-05) BUHLER, R. T.; Giacomini R.; MARTINO, J. A.
This work evaluates two important technological variations of Triple-Gate FETs: the use of strained silicon and the occurrence of non-rectangular body cross-section. The anaysis is focused on the electrical parameters for analog applications, and covers a temperature range from 150 K to 400 K. The comparison of the intrinsic voltage gain between the different trapezoidal fin shapes showed that the fin shape can have a major role in some analog parameters than the use of the strained silicon technology, helping to improve those parameters under certain circumstances. The highest intrinsic voltage gains were obtained for strained devices with top fin width larger than bottom at low temperature. Besides the intrinsic voltage gain, were also studied: the threshold voltage, subthreshold swing, drain induced barrier lowering, channel resistance, total harmonic distortion, transconductance, transconductance to drain current ratio, output conductance, Early voltage, drain voltage saturation and unity gain frequency.

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