Repositório do Conhecimento Institucional do Centro Universitário FEI
 

Engenharia Elétrica

URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21

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20153

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Periódico: search.filters.ispartof.SBMicro 2015 - 30th Symposium on Microelectronics Technology and DevicesAssunto: search.filters.subject.Self-cascode

Resultados da Pesquisa

Agora exibindo 1 - 3 de 3
  • N/D
    Artigo de evento 4 Citação(ões) na Scopus
    Use of back gate bias to enhance the analog performance of planar FD and UTBB SOI transistors-based self-cascode structures
    (2015-10-13) Rodrido Doria; FLANDRE, D.; TREVISOLLI, R.; Michelly De Souza; Marcelo Antonio Pavanello
    This paper reports, for the first time, the use of back gate bias to improve the intrinsic voltage gain of self-cascode structures composed by planar FD and UTBB SOI MOSFETs. It is shown a voltage gain improvement larger than 10 dB when either a forward back bias is applied to the drain-side transistor or a reverse back bias is applied to the source side device.
  • N/D
    Artigo de evento 0 Citação(ões) na Scopus
    Effect of channel doping concentration on the harmonic distortion of asymmetric n-and p-type self-cascode MOSFETs
    (2015-09-04) D´OLIVEIRA, L. M.; Rodrido Doria; Marcelo Antonio Pavanello; FLANDRE. D.; Michelly De Souza
    © 2015 IEEE.This paper compares the harmonic distortion of n-and p-type symmetric (S-SC) and asymmetric self-cascode (A-SC) structures of different channel doping concentrations, providing a physic analysis of its behavior. This study is made by experimental measurements of structures composed by n-and p-type MOSFETs taking the second and third order harmonics as figures of merit. For strong inversion, the normalized second order harmonic distortion was better for the A-SC structures composed by devices with lower channel doping concentration on the transistor near the drain for either n-and p-type composite MOSFETs.
  • N/D
    Artigo de evento 3 Citação(ões) na Scopus
    Asymmetric Self-Cascode versus Graded-Channel SOI nMOSFETs for analog applications
    (2015-10-13) ASSALTI, R.; Marcelo Antonio Pavanello; FLANDRE, D.; Michelly De Souza
    This paper compares the performance of Asymmetric Self-Cascode and Graded-Channel SOI nMOSFETs, both proposed to improve the analog performance of fully depleted SOI nMOSFETs. The differences at device level are evaluated and the impact of their application in basic analog circuits, i.e. common-source amplifier, source-follower and common-source current mirror are explored through experimental results.