Engenharia Elétrica
URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21
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3 resultados
Resultados da Pesquisa
- Junctionless nanowire transistors effective channel length extraction through capacitance characteristics(2023-10-05) SILVA, E. M.; TREVISOLI, R.; Rodrigo Doria© 2023 Elsevier LtdThis work aims to extract the effective channel length (LEFF) of Junctionless Nanowire Transistors (JNT) through the maximum gate capacitance of the devices. The LEFF extraction has been done by extrapolating the maximum gate capacitance as a function of the devices’ channel length (LMASK) and has shown that LEFF is around 10–15 nm longer than LMASK for devices of different channel doping concentrations.
- Analog characteristics of n-type vertically stacked nanowires(2021) MARINIELLO, G.; CARVALHO, C. A. B. D.; CARDOSO, PAZ, B.; BARRAUD, S.; VINET, M.; FAYNOT, O.; Marcelo Antonio Pavanello© 2021This paper presents the fundamental analog figures of merit, such as the transconductance, output conductance, transconductance over drain current ratio, intrinsic voltage gain and harmonic distortion (or non-linearity), of n-type vertically stacked nanowires with variable fin width and channel length. To have a physical insight on the results, the basic electrical parameters such as threshold voltage, subthreshold slope and low field electron mobility of the analyzed transistors were also studied. The studied analog parameters are presented in function of the transconductance over drain current, to allow for the comparison at the same inversion level.
- Direct determination of threshold condition in DG-MOSFETs from the g m/ID curve(2011) Cunha A.I.A.; Pavanello M.A.; Trevisoli R.D.; Galup-Montoro C.; Schneider M.C.In this work we apply the current-based threshold voltage definition (equality between the drift and diffusion components of drain current) to intrinsic symmetric double-gate MOSFETs. We show that the half maximum point of the gm/ID (transconductance-to-current ratio) curve in the linear region corresponds exactly to the condition IDdrift = I Ddiff when mobility variation is neglected. Numerical simulations show that the threshold voltages determined from the gm/ID curve and from the IDdrift = IDdiff condition differ by about φt/2 (one half of the thermal voltage) when considering realistic mobility variations. Simulation results show that the threshold voltages determined with the gm/ID procedure are close to those obtained with the Y (=ID/gm) function method for a considerable range of silicon film thicknesses, channel lengths, and temperature values. The current-based procedure has also been successfully applied experimentally to a FinFET over a wide temperature range. © 2010 Elsevier Ltd. All rights reserved.