Please use this identifier to cite or link to this item: https://repositorio.fei.edu.br/handle/FEI/1102
Title: Compact core model for Symmetric Double-Gate Junctionless Transistors
Authors: CERDEIRA, Antonio
AVILA, F.
INIGUEZ, Benjamin
DE SOUZA, Michelly
PAVANELLO, Marcelo A.
CUETO, Magali Estrada
Issue Date: 2014
Journal: Solid-State Electronics
ISSN: 0038-1101
Citation: CERDEIRA, Antonio; AVILA, F.; INIGUEZ, Benjamin; DE SOUZA, Michelly; PAVANELLO, Marcelo A.; CUETO, Magali Estrada. Compact core model for Symmetric Double-Gate Junctionless Transistors. Solid-State Electronics, v. 94, p. 91-97, 2014.
Access Type: Acesso Aberto
DOI: 10.1016/j.sse.2014.02.011
URI: https://repositorio.fei.edu.br/handle/FEI/1102
Appears in Collections:Artigos

Files in This Item:
There are no files associated with this item.


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.