Analytical model for the dynamic behavior of triple-gate junctionless nanowire transistors
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Artigo
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2016
Autores
Trevisoli R.
Doria R.T.
De Souza M.
Barraud S.
Vinet M.
Pavanello M.A.
Doria R.T.
De Souza M.
Barraud S.
Vinet M.
Pavanello M.A.
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IEEE Transactions on Electron Devices
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TREVISOLI, RENAN; Doria, Rodrigo Trevisoli; DE SOUZA, Michelly; BARRAUD, SYLVAIN; VINET, MAUD; Pavanello, Marcelo Antonio. Analytical Model for the Dynamic Behavior of Triple-Gate Junctionless Nanowire Transistors. IEEE TRANSACTIONS ON ELECTRON DEVICES, v. 63, n. 2, p. 856-863, 2016.
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© 2015 IEEE.This paper presents an analytical model for the intrinsic capacitances and transconductances of triple-gate junctionless nanowire transistors. The model is based on a surface-potential drain current model, which includes shortchannel effects, and accounts for the dependences on the device dimensions, doping concentration, and quantum effects. It is validated with 3-D Technology Computer-Aided Design (TCAD) simulations for several device characteristics and biases as well as with the experimental results.