Please use this identifier to cite or link to this item: https://repositorio.fei.edu.br/handle/FEI/1127
Title: Analysis of the substrate bias effect on the interface trapped charges in junctionless nanowire transistors through low-frequency noise characterization
Authors: DORIA, Rodrigo Trevisoli
TREVISOLI, Renan D.
DE SOUZA, Michelly
VINET, MAUD
BARRAUD, SYLVAIN
PAVANELLO, Marcelo A.
Issue Date: 2017
Journal: MICROELECTRONIC ENGINEERING
ISSN: 0167-9317
Citation: DORIA, Rodrigo Trevisoli; TREVISOLI, Renan D.; DE SOUZA, Michelly; VINET, MAUD; BARRAUD, SYLVAIN; PAVANELLO, Marcelo A.. Analysis of the substrate bias effect on the interface trapped charges in junctionless nanowire transistors through low-frequency noise characterization. MICROELECTRONIC ENGINEERING, v. 178, p. 17-20, 2017.
Access Type: Acesso Aberto
DOI: 10.1016/j.mee.2017.04.014
URI: https://repositorio.fei.edu.br/handle/FEI/1127
Appears in Collections:Artigos

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