Methodology to optimize and reduce the total gate area of robust operational transconductance amplifiers by using diamond layout style for MOSFETs
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Citações na Scopus
2
Tipo de produção
Artigo
Data
2020-11-22
Autores
BANIN JÚNIOR, JOSÉ ROBERTO
MORETO, RODRIGO ALVES DE LIMA
SILVA, GABRIEL AUGUSTO DA
THOMAZ, CARLOS EDUARDO
Salvador Gimenez
MORETO, RODRIGO ALVES DE LIMA
SILVA, GABRIEL AUGUSTO DA
THOMAZ, CARLOS EDUARDO
Salvador Gimenez
Orientador
Periódico
ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING
Título da Revista
ISSN da Revista
Título de Volume
Citação
BANIN JÚNIOR, J. R.; MORETO, R. A. DE L.; SILVA, G. A. DA; THOMAZ, C. E; GIMENEZ, S. P. Methodology to optimize and reduce the total gate area of robust operational transconductance amplifiers by using diamond layout style for MOSFETs. ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, v. 106, p. 293–306, 2021
Texto completo (DOI)
Palavras-chave
Diamond MOSFET,Hexagonal layout style,Design,Optimization,Operational transconductance amplifier,iMTGSPICE,SPICE simulation,Electronic evolutionary,OTA
Resumo
This paper describes a pioneering methodology to design, optimize, and reduce the total gate area of robust Operational
Transconductance Amplifiers (OTAs). The Single-Ended Single-Stage (SESS) OTA has been chosen to validate the
proposed technique by using the 180 nm planar Complementary Metal-Oxide-Semiconductor (CMOS) Integrated Circuits
(ICs) technology. The Electronic Design Automationtool, named iMTGSPICE, was used to design and optimize the SESS
OTA. There are several heuristics optimization techniques of Artificial Intelligence to optimize analog and radio-frequency
CMOS ICs, but we have selected to use the Genetic Algorithm because it presents the best optimization performance
among the other algorithms previously studied. This paper also describes a procedure of converting the Conventional
planar MOSFETs (rectangular gate shape) into the Diamond MOSFETs (hexagonal gate shape) with the same electrical
performance. Furthermore, it is proposed a procedure to simulate the Diamond MOSFETs (DMs) in the Simulation
Program with Integrated Circuit Emphasis (SPICE) because there is still no SPICE model to perform the DM. Additionally,
this work proposes a methodology to layout OTAs with Diamond MOSFETs, regarding different values of aspect ratios.
The main result of this work reveals a total gate area reduction of approximately 30% of a robust OTA implemented with
Diamond MOSFETs, with an alpha angle (a) equal to 45, with respect to the one observed in the robust OTA implemented
with standard MOSFETs, maintaining practically the same electrical performance and robustness.