A novel processor architecture with a hardware microkernel to improve the performance of task-based systems
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2019-06-05
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DANTAS, L. P.
DE AZEVEDO, R. J.
Salvador Gimenez
DE AZEVEDO, R. J.
Salvador Gimenez
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IEEE Embedded Systems Letters
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DANTAS, L. P. ; DE AZEVEDO, R. J.; GIMENEZ, S. A novel processor architecture with a hardware microkernel to improve the performance of task-based systems. IEEE Embedded Systems Letters, v. 11, n. 2, p. 46-49, Jun. 2019.
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© 2018 IEEE.The use of hardware to perform part of central processing unit (CPU) processing functions is a consolidated practice that produces good results in terms of power and performance when applied in embedded systems. This letter describes the changes in the processor architecture to embed the functions of a microkernel to boost the performance of task-based systems. Part of the CPU overhead is caused by the microkernel to run the scheduler algorithm and context switching. Therefore, the microkernel's functions, supported by a single additional internal register bank, were implemented by hardware to work in parallel with the CPU to reduce the task dispatch time. The experimental results show that by using this approach, the performance is virtually independent of the time slice, whereas the conventional approach (software implementation) is degraded by 79% as the time slice decreases.