Use of back gate bias to enhance the analog performance of planar FD and UTBB SOI transistors-based self-cascode structures
dc.contributor.author | Rodrido Doria | |
dc.contributor.author | FLANDRE, D. | |
dc.contributor.author | TREVISOLLI, R. | |
dc.contributor.author | Michelly De Souza | |
dc.contributor.author | Marcelo Antonio Pavanello | |
dc.contributor.authorOrcid | https://orcid.org/0000-0003-1361-3650 | |
dc.contributor.authorOrcid | https://orcid.org/0000-0001-6472-4807 | |
dc.contributor.authorOrcid | https://orcid.org/0000-0003-4448-4337 | |
dc.date.accessioned | 2022-01-12T21:59:45Z | |
dc.date.available | 2022-01-12T21:59:45Z | |
dc.date.issued | 2015-10-13 | |
dc.description.abstract | This paper reports, for the first time, the use of back gate bias to improve the intrinsic voltage gain of self-cascode structures composed by planar FD and UTBB SOI MOSFETs. It is shown a voltage gain improvement larger than 10 dB when either a forward back bias is applied to the drain-side transistor or a reverse back bias is applied to the source side device. | |
dc.identifier.citation | DORIA, R.; FLANDRE, D.; TREVISOLLI, R.; DE SOUZA, M.; PAVANELLO, M. A. Use of back gate bias to enhance the analog performance of planar FD and UTBB SOI transistors-based self-cascode structures. SBMicro 2015 - 30th Symposium on Microelectronics Technology and Devices. Oct. 2015. | |
dc.identifier.doi | 10.1109/SBMicro.2015.7298134 | |
dc.identifier.uri | https://repositorio.fei.edu.br/handle/FEI/3953 | |
dc.relation.ispartof | SBMicro 2015 - 30th Symposium on Microelectronics Technology and Devices | |
dc.rights | Acesso Restrito | |
dc.subject.otherlanguage | Self-Cascode | |
dc.subject.otherlanguage | Silicon-on-Insulator | |
dc.subject.otherlanguage | UTBB | |
dc.title | Use of back gate bias to enhance the analog performance of planar FD and UTBB SOI transistors-based self-cascode structures | |
dc.type | Artigo de evento | |
fei.scopus.citations | 4 | |
fei.scopus.eid | 2-s2.0-84961784558 | |
fei.scopus.subject | Analog performance | |
fei.scopus.subject | Back-gate bias | |
fei.scopus.subject | Intrinsic voltage gains | |
fei.scopus.subject | Reverse back bias | |
fei.scopus.subject | Self-cascode | |
fei.scopus.subject | SOI transistors | |
fei.scopus.subject | UTBB | |
fei.scopus.subject | Voltage gain | |
fei.scopus.updated | 2024-09-01 | |
fei.scopus.url | https://www.scopus.com/inward/record.uri?partnerID=HzOxMe3b&scp=84961784558&origin=inward |