Engenharia Elétrica
URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21
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9 resultados
Resultados da Pesquisa
- Analog parameters of strained non-rectangular triple gate FinFETs(2010-01-05) BÜHLER, Rudolf Theoderich; Renato Giacomini; MARTINO, J. A.The strained silicon technology together to the reduction of the temperature is studied in this paper on trapezoidal triple gate FinFETs, through three-dimensional numerical simulation, with particular focus on analog parameters. The comparison of the intrinsic voltage gain between the different trapezoidal fin shapes demonstrated that, although the strained silicon technology provided higher intrinsic voltage gain, the fin shape can have a major role in analog parameters, helping to improve those parameters under certain circumstances. Higher intrinsic voltage gains were obtained for strained devices with top fin width larger than bottom. ©The Electrochemical Society.
- Influence of fin width and channel length on the performance of buffers implemented with standard and strained triple-gate nFinFETs(2009-09-03) Marcelo Antonio Pavanello; MARTINO, J. A.; SIMOEN, E.; ROOYACKERS, R.; COLLAERT, N.; CLAEYS, C.In this work the application of standard and strained triple-gate FinFETs in unity-gain source-follower configuration is compared. The analysis is performed by evaluating the buffer voltage gain with respect to the fin width and channel length as well as the total harmonic distortion. It is demonstrated that the application of strained material in narrow FinFETs, when the devices are operating in double-gate mode, can be beneficial for the performance of buffers in any channel length. On the other hand, for triple-gate FinFETs or quasi-planar ones the degradation of the output conductance overcomes the transconductance improvements from strained material and the performance of standard buffers is better than of strained ones. Narrow strained buffers also offer better harmonic distortion. © The Electrochemical Society.
- Harmonic distortion analysis of SOI triple gate FinFETs applied to 2-MOS balanced structures(2009-05-29) Rodrigo Doria; MARTINO, J. A.; CERDEIRA, A.; Marcelo Antonio PavanelloThis work presents an evaluation of the non-linearities exhibited in 2-MOS resistive structures composed by triple gate FinFETs with several fin widths down to 30 nm. The harmonic distortion has been analysed in terms of its third order component (HD3) as a function of the gate voltage, the input amplitude voltage and the fin width. The linearity has also been analysed with respect to the on-resistance, which constitutes a key parameter in such circuits. Along the harmonic distortion evaluation, the non-linearity causes are pointed out. At lower gate voltages, wider devices present smaller HD3 with respect to the narrower ones, while the contrary occurs at higher gate voltages. ©The Electrochemical Society.
- Three-dimensional simulation of biaxially strained triple-gate FinFETs: A method to compute the fin width and channel length dependences on device electrical characteristics(2010-01-05) Rodrigo Doria; Marcelo Antonio PavanelloStrained devices have been the focus of recent research works due to the boost in the carrier mobility providing a drain current enhancement. Consequently, simulating strained transistors become of major importance in order to predict their characteristics. However, the non-uniformity of the stress distribution creates a dependence of the strain on the device dimensions. This dependence cannot be easily considered in a TCAD simulation. This work shows that the definition of an analytical function for the strain components can overcome this drawback in the stress simulation. Maximum transconductance gain was used as the key parameter to compare simulated and experimental data. The results obtained show mat the simulations with the analytical function agree wim the measurements. ©The Electrochemical Society.
- Stress relaxation empirical model for biaxially strained triple-gate devices(2011-01-05) TREVISOLI, R. D.; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.; PAVANELLO, M. A.Multiple gate devices provides short channel effects reduction, been considered promising for sub 20 nm era. Strain engineering has also been considered as an alternative to the miniaturization due to the boost in the carrier mobility. The stress non-uniformity in Multiple gate devices cannot be easily considered in a TCAD device simulation without the coupled process simulation which is a cumbersome task. This work analyses the use of an analytical function to compute accurately the dependence of the strain on the device dimensions. The maximum transconductance gain and the threshold voltage shift are used as key parameters to compare simulated and experimental data. ©The Electrochemical Society.
- An analytical model for the non-linearity of triple gate SOI MOSFETs(2011-01-05) Rodrigo Doria; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.; Marcelo Antonio PavanelloThis work proposes a physically-based analytical model for the non-linearity of Triple-Gate MOSFETs. The model describes the second order harmonic distortion (HD2), usually the major non-linearity source, as a function of the device dimensions, the series resistance, the low field mobility and the mobility degradation factor (θ). The model was applied to transistors of different channel lengths and fin widths and allowed to conclude that θ is the parameter which most contributes for the increase of HD2. The model was validated for both unstrained and strained FinFETs. ©The Electrochemical Society.
- Strain effectiveness dependence on fin dimensions and shape for n-type triple-gate MuGFETs(2011-09-02) BÜHLER, Rudolf Theoderich; Renato Giacomini; AGOPIAN, P. G. D.; MARTINO, J. A.We analyze in this work, for the first time, the effectiveness and the dependence of the induced uniaxial stress on process variables, using the CESL technique on n-type MuGFETs thought 3D simulations. The fin cross-section shape variation is also included with a complete study on the stress distribution and the electric characterization of the device to measure the impact on its performance. The stress distribution and the device performance exhibited dependence with the shape and fin dimensions, with longer and taller inverse trapezium fin possessing better stress and DC characteristics, and better AC performance on the regular trapezium. ©The Electrochemical Society.
- Impact of substrate rotation and temperature on the mobility and series resistance of triple-gate SOI nMOSFETs(2011-09-02) Michely De Souza; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.; Marcelo Antonio PavanelloIn this work a comparative experimental analysis of the electron mobility and parasitic source-drain series resistance of triple-gate n-channel MOSFETs as a function of the temperature is carried out. Devices with different fin widths fabricated on standard non-rotated and 45° rotated SOI substrates were analyzed for temperatures ranging from 250 K to 400 K. It is shown that the use of rotated substrate does not affect the subthreshold slope or the threshold voltage variation with temperature of these devices. On the other hand, the change in the conduction plane not only improves the mobility, but also promotes a rise of its variation with temperature. Although the fin width reduction may cause an increase of the series resistance, the increased mobility of rotated devices is responsible for the series resistance roll-off and this reduction becomes larger as the fin is narrowed. © The Electrochemical Society.
- Fin dimension influence on mechanical stressors in triple-gate SOI nMOSFETs(2013-05-16) BÜHLER, Rudolf Theoderich; SIMOEN, E.; AGOPIAN, P. G. D.; CLAEYS, C.; MARTINO, J. A.This work studies the SiGe SRB and tCESL strained triple-gate SOI nMOSFETs using experimental devices and also process and device numerical simulations. The transconductance and mobility are investigated and analyzed with the strain data obtained from process simulations, including the influence of the fin dimensions on the strain. The use of SiGe SRB and tCESL strain combined resulted in higher strain and higher maximum transconductance. © The Electrochemical Society.