Engenharia Elétrica
URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21
Navegar
11 resultados
Resultados da Pesquisa
- Sidewall angle influence on the FinFET analog parameters(2007-09-06) Renato Giacomini; MARTINO, J. A.; Marcelo Antonio PavanelloThe width variations along the vertical direction, due to process limitations, that appear in some fabricated FinFETs lead to non-rectangular cross-sectional shapes. One of the most frequent shapes is the trapezoidal (inclined sidewalls). These geometry variations may cause some changes in the device electrical characteristics. This work analyses the influence of the sidewall inclination angle on analog parameters, such as voltage gain, transconductance, output conductance, threshold voltage and also on the corner effects, through 3-D numeric simulation. © The Electrochemical Society.
- Low temperature operation of undoped body triple-gate FinFETs from an analog perspective(2007-09-06) Marcelo Antonio Pavanello; MARTINO, J. A.; SIMOEN, E.; ROOYACKERS R.; COLLAERT, N.; CLAEYS, CThis paper studies the temperature reduction influence on some analog figures of merit of n-type triple-gate FinFETs with undoped body, using DC measurements. It is demonstrated that the temperature reduction improves the transconductance over drain current ratio in any operational region. On the other hand, the output conductance is degraded when the temperature is reduced. The combination of these effects shows that the intrinsic gain of a L=90 nm FinFET is degraded by 3 dB when the temperature reduces from 300 K down to 100 K. A comparison with planar single gate fully depleted SOI reveals that the temperature degradation of the output conductance in FinFETs is less temperature-dependent. © The Electrochemical Society.
- Influence of fin width and channel length on the performance of buffers implemented with standard and strained triple-gate nFinFETs(2009-09-03) Marcelo Antonio Pavanello; MARTINO, J. A.; SIMOEN, E.; ROOYACKERS, R.; COLLAERT, N.; CLAEYS, C.In this work the application of standard and strained triple-gate FinFETs in unity-gain source-follower configuration is compared. The analysis is performed by evaluating the buffer voltage gain with respect to the fin width and channel length as well as the total harmonic distortion. It is demonstrated that the application of strained material in narrow FinFETs, when the devices are operating in double-gate mode, can be beneficial for the performance of buffers in any channel length. On the other hand, for triple-gate FinFETs or quasi-planar ones the degradation of the output conductance overcomes the transconductance improvements from strained material and the performance of standard buffers is better than of strained ones. Narrow strained buffers also offer better harmonic distortion. © The Electrochemical Society.
- Global and/or local strain influence on p- and nMuGFET analog performance(2011-01-05) AGOPIAN, P. G. D.; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.In this work, the analog performance is evaluated for tri-gate p-and nMuGFETs processed with and without the implementation of different global or local strain engineering techniques. For n-channel devices, the intrinsic voltage gain showed to be worse for strained devices when the fin is narrow. Only for wider fins the voltage gain increases with the strain efficiency due to mobility enhancement. Besides the voltage gain, the transconductance, output conductance and Early Voltage are also evaluated. In spite of the smaller impact of strain engineering, pMuGFETs show better analog behavior for all studied parameters. ©The Electrochemical Society.
- Analysis of the self-heating effect in UTBOX devices(2012-08-30) RODRIGUES, M.; CRUZ, E. O.; Milene Galeti; MARTINO, J. A.This work presents a study of the self-heating effect (SHE) on -n type UTBOX devices. Thinner buried oxide indicated a reduction on degradation caused by the SH phenomenon as shown by drain current and transient time. Addressed to that, a smaller output conductance variation with the frequency was also related where a higher frequency is required for the SHE emergence. The ground plane region was also considered on the UTBOX devices indicating to be favorable in suppress the SHE. © The Electrochemical Society.
- Uniaxial and/or biaxial strain influence on MuGFET devices(2012-01-05) AGOPIAN, P. G. D.; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.In this work, the impact of global andor local strain engineering techniques on tri-gate p- and nMuGFETs performance is experimentally evaluated. Multiple gate structures were analyzed through basic and analog performance parameters for four different splits processed with different strain-engineering techniques (unstrained, uniaxial, biaxial and uniaxial+biaxial stress). While n-channel devices with narrow fins present a worse analog behavior, biaxial stress promotes the electron mobility for larger devices increasing the voltage gain. Besides the voltage gain, the transconductance, output conductance and Early Voltage are also evaluated. Although pMuGFETs are less affected by the strain engineering, they present better analog behavior for all studied devices. © 2012 The Electrochemical Society.
- Back bias influence on analog performance of pTFET(2013-10-10) AGOPIAN, P. G. D.; NEVES, F. S.; MARTINO, J. A.; VANDOOREN, A.; ROOYACKERS, R.; SIMOEN, E.; CLAEYS, C.In this work the back bias influence on the analog performance of tunnel-FETs is evaluated experimentally for the first time. The analysis of the transconductance, output conductance and intrinsic voltage gain (Av) was performed by comparing the pTFET behavior with a well-known pFinFET that was fabricated using the same process flow. Numerical simulations were also performed in order to explain the pTFET behavior. Although the pTFET shows to be more susceptible to the back bias condition, it also shows to present always a better Av for all bias conditions. The best result in both devices was obtained when the back bias is near 0 V and the Av difference is around 30 dB in favor of pTFET. © 2013 IEEE.
- NW-TFET analog performance for different Ge source compositions(2013-10-10) AGOPIAN, P. G. D.; DOS SANTOS, S. D.; NEVES, F. S.; MARTINO, J. A.; VANDOOREN, A.; ROOYACKERS, R.; SIMOEN, E.; CLAEYS, C.The analog performance of hetero-junction vertical NanoWire Tunnel FETs (NW-TFETs) with different Ge source compositions (27% and 46%) is studied and compared to Si source devices. Although the NW-TFETs with the highest amount of Ge at the source present the highest transconductance (lower bandgap and higher BTBT predominance), the NW-TFETs with 27% Ge source present a better intrinsic voltage gain (AV) due to their better output conductance (less drain electric field penetration than for 46%). The Si source NW-TFET presented the worst analog behavior at lower gate bias. However, when VGS increases, smaller is its AV degradation making it equal or better than the value obtained for SiGe source devices, since in the former the Trap Assisted Tunneling (TAT) is predominant. The peculiar NW-TFET low frequency noise behavior is also presented. © 2013 IEEE.
- Influence of 45° Substrate Rotation on the Analog Performance of Biaxially Strained-Silicon SOI MuGFETs(2013-05-16) DE SOUZA, M. A. S.; Rodrido Doria; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.; Marcelo Antonio PavanelloIn this work the influence of the substrate rotation on the analog performance of strained SOI MuGFETs is presented. Measurements performed in fabricated devices show a degradation of the maximum transconductance at both linear and saturation regime. The substrate rotation has no influence on the output conductance. The intrinsic voltage gain and the unit gain frequency were extracted and presented a reduction promoted by substrate rotation, being more evident for a narrow fin. © The Electrochemical Society.
- Temperature influence on strained nMuGFETs after proton radiation(2013-05-13) BORDALLO, C.; AGOPIAN, P. G. D.; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.In this work the influence of temperature on strained n-channel multiple gate devices after proton irradiation is analyzed for two different splits: unstressed and highly stressed devices. This study is based on the analysis of the subthreshold slope, drain induced barrier lowering, transconductance, output conductance and intrinsic voltage gain. It is observed that the influence of a temperature increase on the devices performance is higher than the influence of stress and proton radiation. © The Electrochemical Society.