Engenharia Elétrica
URI permanente desta comunidadehttps://repositorio.fei.edu.br/handle/FEI/21
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6 resultados
Resultados da Pesquisa
- Impact of series resistance on the drain current variability in inversion mode and junctionless nanowire transistors(2023-10-05) SILVA, L. M. B. DA; Marcelo Antonio Pavanello; CASSÉ, M.; BARRAUD, S.; VINET, M.; FAYNOT, O.; Michelly De Souza© 2023 Elsevier LtdThis work analyzes the influence of source-drain series resistance variability over the drain current in junctionless and inversion mode nanowire transistors. A comparison between drain current and Y-function variability is presented using experimental data of nanowires with different widths and channel lengths. The source-drain series resistance variability is also presented. The results indicates that source-drain series resistance influence is higher on drain current variability for junctionless than inversion mode nanowire transistors.
- Analysis of Variability in Transconductance and Mobility of Nanowire Transistors(2022-08-22) SILVA, L. M. B. DA; Marcelo Antonio Pavanello; CASSE, M.; BARRAUD, S.; VINET, M.; FAYNOT, O.; Michelly De Souza© 2022 IEEE.This work presents a comparison between the variability in junctionless nanowire transistors and inversion-mode nanowire transistors, looking at the transconductance, low-field mobility, linear and quadratic mobility degradation coefficients. To extract these parameters, the Y-Function method has been used. The obtained results shows differences in mobility and transconductance matching coefficients, indicating that mobility influence is not the only source of transconductance variation.
- Experimental Comparison of Junctionless and Inversion-Mode Nanowire MOSFETs Electrical Properties at High Temperatures(2022-08-22) PRATES, R. R.; BARRAUD, S.; CASSE, M.; VINET, M.; FAYNOT, O.; Marcelo Antonio Pavanello© 2022 IEEE.This work aims to present the electrical properties of junctionless and inversion-mode nanowires MOSFETs in the temperature range from 300 K to 580 K. Devices with different fin widths are compared. The comparison is performed using experimental data looking for some of the fundamental electrical parameters of these transistors such as threshold voltage, inverse subthreshold slope, current, and carrier mobility over the temperature.
- Experimental Assessment of Variability in Junctionless Nanowire nMOS Transistors(2021-09-06) Michelly De Souza; BARRAUD, S.; CASSE, M.; VINET, M.; FAYNOR, O.; Marcelo Antonio PavanelloIn this work, experimental assessment of the variability of threshold voltage and drain current in junctionless nanowire n MOS transistors is presented. Die-to-die variability of threshold voltage and drain current is presented and compared to inversion mode nanowire with the same dimensions. Although the junctionless nanowires have shown larger threshold voltage matching coefficients than inversion mode devices, the variability obtained experimentally has shown to be smaller than predicted by some simulations reported in the literature. Also, it has been shown that as the channel length of junctionless nanowire transistors is reduced, the current variability becomes smaller than in inversion mode nanowires, at the same current level and dimensions.
- Experimental comparative analysis between junctionless and inversion mode nanowire transistors down to 10 nm-long channel lengths(2018-10-18) Rodrigo Doria; TREVISOLI, R.; Michelly De Souza; Marcelo Antonio Pavanello; VINET, M.; CASSE, M.; FAYNOT, O.This paper aims at presenting, for the first time, an experimental comparative analysis between the main electrical parameters of Junctionless (JNT) and inversion mode nanowire (IM) transistors fabricated in SOI technology down to channel length of 10 nm. The analysis has shown that JNTs present larger immunity to SCEs with respect to IM nanowires of similar dimensions. However, JNTs have shown poorer Ion than IM devices, which could be compensated through the application of multifin JNTs, at cost of increasing area consumption.
- Low-frequency noise investigation in long-channel fully depleted inversion mode n-type SOI nanowire(2018-08-27) MOLTO, A. R.; PAZ, B. C.; CASSE, M.; BARRAUD, S.; REIMBOLD, G.; VINET, M.; FAYNOT, O.; Marcelo Antonio PavanelloThis work presents a Low-Frequency Noise (LFN) investigation in fully depleted n-type Silicon-On-Insulator (SOI) nanowire transistors working in linear region with VDS = 50mV. Long-channel devices of 1μ {m and 10μ {m are evaluated. A wide range of fin width is considered in the LFN analysis, from 15nm up to 105nm. The results showed a flicker noise (1/FF) behavior and a decrease of normalized noise SID/IDs2 with gate voltage overdrive increase for frequencies bellow 500Hz. Above this frequency, it was possible to see that generation and recombination noise with 1/f2 decay overlaps the flicker noise, becoming the predominant noise source. The cut-off frequency increases with gate voltage overdrive while the gamma exponent decreases. Gamma reduces from 1.3 to 0.9 and from 0.95 to 0.65 for devices with channel length of 1 μ {m and 10μ {m, respectively. A major noise variation of about one order of magnitude with gate voltage overdrive increase was observed in devices of 1 μ {m long in comparison to channel length of 10μ {m. The devices showed weak noise dependence on fin width due to mobility decrease as nanowires become narrower.