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A compact model and an extraction method for the FinFET spreading resistance
(2011-09-02) Marcelo Parada; MALHEIRO, C. T.; AGOPIAN, P. G. D.; Renato Giacomini
This work presents a study of the FinFET series resistance focused on the spreading component. A new simple analytical expression is proposed to easily estimate and model this parasitic parameter. The extraction method departs from the drain current versus gate voltage curves of several channel and source/drain lengths. The resistance values extracted from simulated devices are compared to the outputs of the analytic model and a very good agreement is achieved. The proposed model showed accurate estimative for a wider range of devices then previously published models. © The Electrochemical Society.
A simple electron mobility model considering the impact of silicon-dielectric interface orientation for surrounding gate devices
(2011-09-02) PERIN, A. L.; PEREIRA, A. S. N.; AGOPIAN, P. G. D.; MARTINO, J. A.; Renato Giacomini
In this work, we present a simple mobility model that takes into account the variation of the carrier's mobility according to crystallographic orientations of the silicon-dielectric interface. The effective mobility of simulated devices was compared to experimental data for several interface orientations and showed good agreement. The model has been applied to a CYNTHIA nMOS transistor and allowed the observation of non-uniform current density around the silicon pillar due to electron mobility variation. ©The Electrochemical Society.
Alpha radiation incidence angle influence on planar FDSOI nMOSFET
(2011) MAGALHAES, R. A.; AGOPIAN, P. G. D.; GUAZZELLI, M. A.; GIACOMINI, R. Alpha radiation incidence angle influence on planar FDSOI nMOSFET. ECS Transactions, v. 39, n. 1, p. 85-89, 2011.; AGOPIAN, P. G. D.; Marcilei Aparecida Guazzelli; Renato Giacomini
This work addresses the dependence of the incidence angle of alpha radiation on nMOSFET FDSOI transistor. The incidence angle ranged from -90 to 90 degrees in the two main symmetry planes of the device. The transitory effects were analyzed through three dimensional numerical simulations. The results showed considerable directivity to single event effects susceptibility. The generalized directivity can be used in the shielding engineering of electronic equipment subjected to isotropic radiation environments. © The Electrochemical Society.
Back bias influence on analog performance of pTFET
(2013-10-10) AGOPIAN, P. G. D.; NEVES, F. S.; MARTINO, J. A.; VANDOOREN, A.; ROOYACKERS, R.; SIMOEN, E.; CLAEYS, C.
In this work the back bias influence on the analog performance of tunnel-FETs is evaluated experimentally for the first time. The analysis of the transconductance, output conductance and intrinsic voltage gain (Av) was performed by comparing the pTFET behavior with a well-known pFinFET that was fabricated using the same process flow. Numerical simulations were also performed in order to explain the pTFET behavior. Although the pTFET shows to be more susceptible to the back bias condition, it also shows to present always a better Av for all bias conditions. The best result in both devices was obtained when the back bias is near 0 V and the Av difference is around 30 dB in favor of pTFET. © 2013 IEEE.
Biaxial stress simulation and electrical characterization of triple-gate SOI nMOSFETs
(2012-09-02) BÜHLER, Rudolf Theoderich; AGOPIAN, P. G. D.; SIMOEN. E.; CLAEYS, C.; MARTINO, J. A.
In this work we study unstrained and biaxially strained triple-gate SOI nMOSFETs by process and device numerical simulations and by electrical characterization. Emphasis is given to the total resistance and transconductance in devices with and without SEG (selective epitaxial growth) and variable fin dimensions. The influence of the fin dimensions on the stress effectiveness is analyzed through 3D process simulations, while the total resistance and transconductance are analyzed through dc measurements. The use of biaxial stress combined with the SEG technique resulted in an lower total resistance and a higher maximum transconductance. © The Electrochemical Society.
DIBL performance of 60 MeV proton-irradiated SOI MuGFETs
(2010-11-04) AGOPIAN, P. G. D.; MARTINO, J. A.; KOBAYASHI, D.; POIZAT, M.; SIMON, E.; CLAEYS, C.
The impact of a 60 MeV proton irradiation on the drain induced barrier lowering is investigated for tri-gate FinFETs processed with and without the implementation of different biaxial or uniaxial strain engineering techniques. A contrasting behavior is observed for n- and pFinFETs, which may be associated with the radiation-induced charges in the buried oxide and the influence of the back channel on the front transistor performance. ©2010 IEEE.
Experimental comparison between pTFET and pFinFET under analog operation
(2013) AGOPIAN, P. G. D.; MARTINO, J. A.; ROOYACKERS, R.; VANDOOREN, A.; SIMON, E.; CLAEYS, C.
In this work, the analog performance of Tunnel FET and FinFET, which have a different principle of operation, is evaluated based on a comparison between them. This comparison is performed through the drain current behavior, the transconductance, the output conductance and the intrinsic voltage gain. Although the TFET devices present a smaller transconductance than the FinFET ones, the output behavior is strongly improved and results in a better performance of TFET devices when the focus is the intrinsic voltage gain. © The Electrochemical Society.
Experimental comparison between trigate p-TFET and p-FinFET analog performance as a function of temperature
(2013-01-05) AGOPIAN, P. G. D.; MARTINO, J. A.; ROOYACKERS, R.; VANDOOREN, A.; SIMOEN, E.; CLAEYS, C.
This paper presents, for the first time, the experimental comparison between the p-type trigate FinFET and trigate p-TFET analog performances for devices fabricated on the same wafer. A careful analysis of the electrical characteristics is performed to choose the best bias conditions for the analog comparison between these devices. A higher intrinsic voltage gain is obtained for p-TFET devices because of their better output conductance, which is more than four orders of magnitude better than the one obtained for p-FinFET transistors at the same bias conditions from room temperature up to 150° C. © 1963-2012 IEEE.
Field effect transistors: From mosfet to Tunnel-Fet analog performance perspective
(2014-10-31) MARTINO, J. A.; AGOPIAN, P. G. D.; SIMOEN, E.; CLAEYS, C.
© 2014 IEEE.This paper will discuss the analog behavior of the main insulated gate field effect transistor (FET) roadmap, like Silicon-On-Insulator (SOI) MOSFET, Graded-Channel (GC) SOI MOSFET, triple-gate SOI FinFET and Tunnel-FET (TFET) devices. The main analog Figures of Merit (FoM) like transconductance over drain current ratio, Early voltage, intrinsic voltage gain and unit gain frequency will be analyzed.
Fin dimension influence on mechanical stressors in triple-gate SOI nMOSFETs
(2013-05-16) BÜHLER, Rudolf Theoderich; SIMOEN, E.; AGOPIAN, P. G. D.; CLAEYS, C.; MARTINO, J. A.
This work studies the SiGe SRB and tCESL strained triple-gate SOI nMOSFETs using experimental devices and also process and device numerical simulations. The transconductance and mobility are investigated and analyzed with the strain data obtained from process simulations, including the influence of the fin dimensions on the strain. The use of SiGe SRB and tCESL strain combined resulted in higher strain and higher maximum transconductance. © The Electrochemical Society.
Fin shape influence on the analog performance of standard and strained MuGFETs
(2010-10-14) BÜHLER, Rudolf Theoderich; MARTINO, J. A; AGOPIAN, P. G. D.; Renato Giacomini; SIMOEN, E.; CLAEYS, C.
Fin width influence on uniaxial stress of triple-gate SOI nMOSFETs
(2012-03-17) BÜHLER, Rudolf Theoderich; MARTINO, J. A.; AGOPIAN, P. G. D.; Renato Giacomini
This work analyzes the fin width dependence on induced uniaxial stress on n-type MuGFETs thought 3D simulations. A study on the stress distribution and the electric characterization of the device to measure the impact on its performance is accomplished. The stress distribution and the device performance exhibited dependence on the fin width, with higher stress transfer for narrower fins resulting in better electrical performance. © 2012 IEEE.
Global and/or local strain influence on p- and nMuGFET analog performance
(2011-01-05) AGOPIAN, P. G. D.; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.
In this work, the analog performance is evaluated for tri-gate p-and nMuGFETs processed with and without the implementation of different global or local strain engineering techniques. For n-channel devices, the intrinsic voltage gain showed to be worse for strained devices when the fin is narrow. Only for wider fins the voltage gain increases with the strain efficiency due to mobility enhancement. Besides the voltage gain, the transconductance, output conductance and Early Voltage are also evaluated. In spite of the smaller impact of strain engineering, pMuGFETs show better analog behavior for all studied parameters. ©The Electrochemical Society.
Impact of proton irradiation on strained triple gate SOI p- and n-MOSFETs
(2011-09-23) AGOPIAN, P. G. D.; MARTINO, J. A.; KOBAYASHI, D.; SIMOEN, E.; CLAEYS, C.
In this work the proton irradiation influence on basic and analog parameters of triple-gate SOI MOSFETs is investigated. The studied devices are strained and unstrained p- and nMuGFETs. The type of stress considered in each case, was the stress that results in a better performance of p- (CESL) and n-devices (sSOI+CESL). Although the results showed the worse behavior for post-irradiated nMOS transistors, a higher immunity to the back interface influence was obtained for post-irradiated pMOS devices and consequently a better analog performance was observed. The unit gain frequency improved for p and nMOS post-irradiated devices. © 2011 IEEE.
Impact of the twin-gate structure on the linear kink effect in PD SOI nMOSFETS
(2006-08-05) AGOPIAN, P. G. D.; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.
In this work, the influence of the twin-gate structure on the gate-induced floating body effects in thin gate oxide partially depleted (PD) silicon-on-insulator (SOI) nMOSFETs is investigated through two-dimensional numerical simulations, which are validated by experimental results. The asymmetric behavior of the body potential with the interchange of the master and slave transistor of the twin-gate structure will be shown, as well as the relation between the total resistance and the effective mobility degradation factor. It will be demonstrated that a similar reduction of the linear kink effect is obtained in a twin-gate structure and in a conventional SOI transistor with an external resistance in series. © 2006 Elsevier Ltd. All rights reserved.
Influence of 60-MeV proton-irradiation on standard and strained n-and p-Channel MuGFETs
(2012-01-05) AGOPIAN, P. G. D.; MARTINO, J. A.; KOBAYASHI, D.; SIMOEN. E.; CLAEYS. C.
In this work the proton irradiation influence on Multiple Gate MOSFETs (MuGFETs) performance is investigated. This analysis was performed through basic and analog parameters considering four different splits (unstrained, uniaxial, biaxial, uniaxial+biaxial). Although the influence of radiation is more pronounced for p-channel devices, in pMuGFETs devices, the radiation promotes a higher immunity to the back interface conduction resulting in the analog performance improvement. On the other hand, the proton irradiation results in a degradation of the post-irradiated n-channel transistors behavior. The unit gain frequency showed to be strongly dependent on stress efficiency and the radiation results in an increase of the unit gain frequency for splits with high stress effectiveness for both cases p-and nMuGFETs. © 2012 IEEE.
NW-TFET analog performance for different Ge source compositions
(2013-10-10) AGOPIAN, P. G. D.; DOS SANTOS, S. D.; NEVES, F. S.; MARTINO, J. A.; VANDOOREN, A.; ROOYACKERS, R.; SIMOEN, E.; CLAEYS, C.
The analog performance of hetero-junction vertical NanoWire Tunnel FETs (NW-TFETs) with different Ge source compositions (27% and 46%) is studied and compared to Si source devices. Although the NW-TFETs with the highest amount of Ge at the source present the highest transconductance (lower bandgap and higher BTBT predominance), the NW-TFETs with 27% Ge source present a better intrinsic voltage gain (AV) due to their better output conductance (less drain electric field penetration than for 46%). The Si source NW-TFET presented the worst analog behavior at lower gate bias. However, when VGS increases, smaller is its AV degradation making it equal or better than the value obtained for SiGe source devices, since in the former the Trap Assisted Tunneling (TAT) is predominant. The peculiar NW-TFET low frequency noise behavior is also presented. © 2013 IEEE.
Radiation effect on standard and strained triple-gate SOI FinFETs parasitic conduction
(2013-09-06) TEIXEIRA, F. F.; BORDALLO, C. C. M.; Marcilei Aparecida Guazzelli; AGOPIAN, P. G. D.; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.
In this work, the X-ray irradiation influence on the back gate conduction and its impact on the drain current characteristic of Triple-Gate SOI FinFET are investigated. The impact of X-ray irradiation was analyzed taking into consideration two different splits: unstrained and uniaxial strained devices. Comparing the p and n-channel transistors response to radiation, the influence of X-rays is more noticeable in n-channel devices due to the positive charges at the buried oxide, increasing the back gate leakage current. The opposite effect is observed in p-channel devices for which the radiation improves some devices characteristics since it makes the device more immune to the back interface conduction. © 2013 IEEE.
Radiation hardness aspects of advanced FinFET and UTBOX devices
(2012-10-04) CLAEYS, C.; AOULAICHE, M.; SIMOEN. E.; GRIFFONI, A.; KOBAYASHI, D.; MAHATME, N. N.; REED. R. A.; SCHRUMPF, R. D.; AGOPIAN, P. G. D.; MARTINO, J. A.
The stringent requirements imposed by the ITRS rely on the introduction of alternative and/or new gate concepts and the implementation of advanced processing modules and materials[1]. During the last decade, alternative gate concepts, with an evolution from planar single gate to double gate, multi-gate FET (MugFET) or FinFET, and gate-all-around (GAA) or nanowire concepts have been extensively studied [2]. Although manufacturing issues have delayed their introduction in production lines, FinFET and MuGFET structures are presently being used for 22 nm technologies. The use of SOI devices leads to an improved radiation performance concerning single event upsets and latch-up [3], but can become worse for micro-dose effects and from a total ionizing dose point of view because of the radiation-induced interface states and trapped charge in the buried oxide [4]. © 2012 IEEE.
Radiation influence on biaxial+uniaxial strained silicon MuGFETs
(2013-10-11) BORDALLO, C.; AGOPIAN, P. G. D.; MARTINO, J. A.; SIMOEN, E.; CLAEYS, C.
In this work the effects of proton irradiation and mechanical stress on the off-state current of MuGFET devices are analyzed for different temperatures. Two different splits are evaluated: an unstrained and biaxial+uniaxial strained one. The off-state current grows with the stress effectiveness due to the GIDL increase and this off-current is even worse when these devices are submitted to proton irradiation due to the increase of the conduction through the back interface. The off-state current of irradiated strained devices reaches unacceptable values, in the range of 26μA at a temperature of 100°C. The temperature has a strong influence on the off-state current since it impacts on both GIDL and back interface conduction. © 2012 by The Electrochemical Society.

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